Qualcomm CEO Says AI Companies Are Demanding 100-Billion-Parameter Phones by 2028

Qualcomm CEO Cristiano Amon disclosed this week that AI-native companies are approaching Qualcomm with a specific hardware specification: running 100-billion-parameter large language models continuously on mobile devices by 2028. Speaking through Alex Heath's Sources column, Amon characterized the trend as a structural shift in who sets the phone hardware brief. "AI companies," he said, "are starting to do phones." In his own words from the interview: "by 2028 I need to make sure that I have the ability to run at least a 100 billion parameter model into a phone."

The significance lies not in the parameter count itself but in who is doing the asking. The customers specifying 100-billion-parameter on-device performance are not Samsung, Xiaomi, or any traditional handset OEM. They are AI laboratories — companies that built cloud-first software businesses and are now designing or commissioning hardware to run frontier models without a persistent server connection.

AI Labs Are Rewriting the Mobile Chip Specification

Traditional handset makers specify SoC requirements around camera image signal processors, cellular modem performance, and battery efficiency. The customer class Amon described specifies chips around inference throughput, memory bandwidth per watt, and power envelope per generated token — a materially different engineering brief, and one Qualcomm has spent two years positioning itself to answer.

Read more: AI memory demand and the $50 billion DRAM supercycle

Current flagship mobile silicon illustrates how far the industry has already traveled. Qualcomm's Snapdragon 8 Elite Extreme Gen 6, announced September 22, 2026 on TSMC's 2nm process, supports 30-billion-parameter mixture-of-experts models on-device through an enlarged shared NPU memory pool. Apple's AFM 3 Core Advanced runs a 20-billion-parameter sparse architecture with 1–4 billion parameters active per request on its most capable Apple silicon hardware. MediaTek's Dimensity 9600 Pro claims comparable 30-billion-parameter support. The mobile industry's practical ceiling in late 2026 is approximately 30 billion parameters. The demand signal Amon relayed is for more than three times that scale.

The 100B Memory Gap: 50 GB Does Not Fit in a 2026 Phone

The core hardware constraint is not processing speed. It is memory capacity and the bandwidth required to stream model weights into compute units fast enough to generate tokens at a useful rate.

A 100-billion-parameter model quantized to INT4 — the most aggressive standard precision reduction for on-device deployment — requires approximately 50 gigabytes of accessible storage. Current flagship smartphones ship with 12–24 GB of LPDDR5X DRAM. The gap is roughly 26 GB — a constraint that faster neural processing units cannot close, because the weights must reside in memory before any compute unit can process them.

Bandwidth compounds the problem. Mobile memory systems operate at 50–90 GB per second. NVIDIA's H100 delivers 3.35 TB per second. That roughly 37-times gap explains why inference that runs fluidly in a data center becomes impractical at the edge, independent of how capable the on-device NPU is.

Why MoE Sparse Activation Does Not Eliminate the 50 GB Footprint

Mixture-of-experts has become the dominant architecture for large on-device models because it reduces compute per token. An MoE model activates only a fraction of its parameters per inference step — a 100B MoE might route through 3–13 billion active parameters per token, substantially reducing FLOPs per generated word.

But sparse activation does not reduce memory footprint. Every parameter in an MoE model must still reside in memory and remain addressable during inference; the weight storage requirement does not shrink because the computational pathway does. A 2026 study examining MoE inference on bandwidth-constrained edge hardware found that inference cost tracks total model parameters rather than active parameters, because the bottleneck shifts from compute to weight streaming. The full 50 GB footprint of a 100B MoE model cannot be engineered away through architecture alone. The memory must be built into the device.

What Qualcomm Has in Place and What Remains Unresolved

Qualcomm arrives at this challenge with infrastructure assembled over the past two years. Its Hexagon NPU, Element Accelerator, and Oryon CPU are designed to cooperate across the memory hierarchy, sharing weights without redundant copies. The Sensing Hub architecture already runs 200-million-parameter models continuously at low power — establishing the always-on inference framework that a persistent phone-resident LLM would require.

The $3.9 billion acquisition of Modular, closed July 29, 2026, brought Chris Lattner into Qualcomm as EVP of Advanced AI Software and Platforms. The acquisition's purpose is a "write once, run anywhere" AI compilation stack that abstracts differences across successive NPU generations. At 100B-parameter scale, software portability has direct commercial value: porting a frontier model to a new chip architecture is expensive, and a unified compilation layer reduces the friction that otherwise advantages incumbent platforms. OpenAI's gpt-oss-20b already runs on Qualcomm Snapdragon PC hardware, demonstrating that the pipeline between an AI lab's model and Qualcomm's inference stack is operational at 20B scale.

What Qualcomm has not publicly specified is the memory architecture that would close the 26 GB gap. Reaching 50 GB of accessible, high-bandwidth mobile DRAM by 2028 will require a significant leap in LPDDR capacity roadmaps, HBM-style stacked memory integrated into the phone package at consumer price points, or a hybrid DRAM-plus-flash architecture capable of streaming at token-generation speeds. None of those paths is technically ruled out, but none is in current flagship production. Qualcomm is also yet to specify whether the 100B target refers to a dense model, an MoE by total parameters, or an MoE by active parameters — distinctions that alter the memory requirement substantially.

The practical test of Amon's 2028 claim will arrive when a chipset and memory specification that can hold 50 GB of model weights at mobile bandwidth become publicly verifiable. Until then, the statement's most concrete meaning is that the companies building AI's next software layer are now actively specifying the hardware that will run it — and that they are asking for substantially more than anything shipping today.