Anthropic Hires Google TPU Founder Amir Salek to Lead Custom Chip Push

Anthropic has recruited Amir Salek — the engineer who built Google's Tensor Processing Unit program from the ground up and ran it for nine years — to join its compute team, the company confirmed Friday. The hire, reported by Bloomberg, slots Salek directly into the leadership structure of Anthropic's nascent in-house silicon effort, where he will report to James Bradbury, Anthropic's head of compute. It is the most consequential chip-executive hire any frontier AI lab has made to staff an internal silicon program, and it arrives less than three weeks after Anthropic publicly acknowledged that it was building a Custom Silicon Team at all.

The timing is not accidental. Anthropic's annual compute spending has been estimated at roughly $19 billion in 2026, and its inference costs — the expense of serving Claude's answers to users in real time — reportedly ran 23 percent over budget in 2025, according to The Information. The company's gross margins stood at approximately 40 percent in 2025, a wide gap from the 77 percent margin target it has told investors it aims to reach before an expected Nasdaq listing. In that financial context, the Salek hire is less a prestige signing than a structural response: Anthropic needs someone who has already solved, at scale, the problem it is trying to solve.

The Leadership Architecture That Makes This Hire Significant

Understanding the full significance of Salek's arrival requires looking at the team that already surrounded him when he joined. James Bradbury, who runs compute at Anthropic, spent years at Google DeepMind as a member of the JAX team — the group that built the numerical computing framework on which Google's large-scale machine learning workloads, including much of the work run on TPU clusters, are executed. Bradbury knows what those chips cost to operate, where the performance headroom lives, and what kinds of model workloads expose the architecture's limits. He is, in the vocabulary of chip programs, a sophisticated power user who became a chip buyer, and then a chip strategist.

The second key figure already in place was Clive Chan, who joined Anthropic in early June 2026. Chan was the second hardware hire ever made on OpenAI's dedicated chip program, where he spent roughly two and a half years working on the Broadcom-designed inference accelerator that OpenAI later unveiled as Jalapeño. At OpenAI, Chan focused on matrix multiplication architecture and hardware performance analysis — the core compute primitives of transformer inference. Before OpenAI, he worked on Tesla's Dojo supercomputer team, building GPU optimization and training infrastructure for Autopilot deep-learning workloads. When he announced his departure for Anthropic on X, he described the move as having been unable to shake "the pull to climb a new mountain from the bottom again" — a precise description of the gap between a program nearing its first production chip and one assembling its first engineers.

What Anthropic has constructed across those three roles is something structurally unusual: the person who built the TPU (Salek), someone who helped build OpenAI's first chip program and worked deeply on matrix acceleration (Chan), and a compute head who ran massive TPU workloads at Google's research scale (Bradbury). No other frontier AI lab assembled equivalent hardware leadership depth in a single hiring cycle. Google's chip program grew over more than a decade of internal experimentation before becoming a genuine competitive advantage. Anthropic appears to be deliberately compressing that accumulation.

Salek's background adds a dimension beyond pure chip engineering that the role specifically demands. After nine years at Google, he joined Cerberus Capital Management as a Senior Managing Director, gaining experience in enterprise-scale capital deployment and the commercial mechanics of infrastructure investment — the business skills required to manage a chip program that will eventually involve foundry contracts, packaging partnerships, and multi-hundred-million-dollar supply commitments. He also joined the board of Untether AI, a Canadian inference-acceleration startup, in early 2024, reinforcing his engagement with the post-training optimization side of AI hardware and keeping him current on the state of the inference-chip landscape from the inside.

Before Google, Salek spent approximately eight years at Nvidia as a Senior Director of Engineering, where he founded and led the company's System-on-Chip design team. That background matters for a co-design program: a chip architect who has worked at Nvidia understands the GPU's design assumptions at a level that allows him to identify exactly which assumptions do not hold for transformer inference workloads and exploit those gaps in a purpose-built alternative. His educational credentials — a bachelor's in Electrical Engineering from Sharif University of Technology and a PhD in Computer Engineering and Computer Science from the University of Southern California — anchor deep technical knowledge to substantial commercial and organizational experience.

What Nine Years of TPU Building Actually Means for Anthropic's Program

The Tensor Processing Unit that Salek built is not a variant of a general-purpose GPU. It was designed from scratch to perform one class of operation — matrix multiplication at reduced numerical precision — with the highest efficiency possible. The central architectural choice was a systolic array: a two-dimensional grid of multiply-accumulate units through which data flows in a regular, wave-like pattern. Each unit computes a partial result and passes intermediate values to its neighbors without making additional memory accesses, allowing the chip to complete large matrix operations in a highly pipelined fashion. Standard GPU execution, by contrast, requires loading operands for each individual multiply-add instruction from a register file or shared memory — a process that incurs substantial overhead at the instruction-dispatch level.

The systolic array architecture is precisely matched to the dominant computation in transformer neural networks. Attention mechanisms and feed-forward layers both reduce to sequences of large matrix multiplications; a chip that executes matrix multiplications as its native operation can skip the instruction-scheduling overhead that a GPU must handle for what is, from its perspective, a specialized pattern of general-purpose arithmetic. That efficiency gap widens at scale: when Claude processes hundreds of thousands of concurrent requests, the per-token cost difference between a general-purpose GPU and a purpose-designed matrix accelerator compounds into material economics.

When Anthropic currently runs Claude on Google's Ironwood TPUs — the seventh and latest generation of the architecture Salek's program produced — it is using a chip whose design assumptions were refined across nine years of iteration to match exactly the kind of workload Claude generates. Ironwood delivers roughly four times the inference performance of its predecessor and is the current anchor of Anthropic's external chip strategy, with the company having committed to accessing up to one million TPU units as part of a deal worth tens of billions of dollars in cloud capacity announced in October 2025, expanded further in April 2026 to include multiple gigawatts of next-generation capacity expected online in 2027.

The significance of hiring the man who designed those chips is that the knowledge transfer runs deeper than any data sheet captures. Salek knows which architectural decisions in the TPU's design history were driven by manufacturing constraints that no longer apply at current process nodes, which assumptions about model workload structure from 2013 through 2022 have been overtaken by the transformer era, and which design choices were deliberate conservatism that future iterations may release. That institutional knowledge is exactly what a co-design program needs: the ability to distinguish between what the existing chip does well because the problem is genuinely hard, and what it does less well because of decisions made under conditions that no longer hold.

Co-design is the conceptual framework Anthropic has used publicly to describe the program. The analogy that most clearly illuminates the goal is Apple's M-series chip. Rather than buying processors designed for generic workloads and then optimizing software to fit constraints the chip designer had not anticipated, Apple designed the hardware and software as a single system, allowing each layer to make architectural assumptions that the other layer enforced. The M1's memory bandwidth, its unified memory architecture, and the tight integration between its CPU and Neural Engine were not independently useful features — they were mutually reinforcing design choices that a generic chip designer targeting a wide market could not make.

Anthropic's version of that logic applies specifically to inference on Claude. The attention patterns Claude generates during a conversation, the typical lengths and formats of requests it handles across its enterprise and consumer deployments, the sparsity patterns in its computation, the sizes of the key-value caches it maintains during multi-turn reasoning — all of these are measurable, stable parameters that a dedicated design team can treat as inputs to the chip's architecture rather than as runtime variables the chip must accommodate dynamically. A chip that treats Claude's actual workload distribution as a first-class design constraint, rather than as one point in a wide distribution of possible AI workloads, can in principle deliver substantially better energy efficiency and throughput per dollar at production inference scale.

The Inference Cost Crisis Driving the Whole Investment

The economics that make a custom silicon program rational at Anthropic's scale are rooted in a problem computer architects named in 1994: the memory wall. For a large language model generating a response token by token, the computational bottleneck during inference is almost never raw arithmetic throughput — it is the speed at which the chip can move model weights from off-chip memory to the compute units that apply them. Generating a single output token from a 70-billion-parameter model at 16-bit precision requires transferring roughly 140 gigabytes of weight data across the memory interface. At the scale Anthropic operates — billions of queries served across millions of users — that data movement compounds into the dominant cost term in the per-token economics.

This matters because it limits what software optimization can accomplish. Techniques like quantization (reducing weight precision from 16-bit to 8-bit or 4-bit) can reduce the weight-transfer volume by up to 75 percent, and Anthropic and every other frontier lab already applies them aggressively. KV-cache compression reduces the memory required to maintain context during generation. Speculative decoding allows draft generations to be verified in parallel, increasing effective throughput. But all of these techniques have implementation floors beyond which further aggressive optimization trades model quality against cost — a tradeoff Anthropic cannot take arbitrarily far on its frontier models, where quality is the primary product.

General-purpose GPUs address the memory wall through High Bandwidth Memory: stacked DRAM arrays mounted on the same package as the compute die, reducing physical distance and increasing the bandwidth available for weight transfers. Nvidia's current generation of inference hardware deploys increasingly dense HBM stacks. The problem is that HBM is expensive per gigabyte, has physical limits on stackable capacity, and is designed for a wide range of workloads. A chip designed specifically for Claude inference can be architected around the actual SRAM-versus-DRAM tradeoff that Claude's weight distributions require, rather than the one that serves Nvidia's entire customer base.

Anthropic's reported 23 percent inference cost overrun in 2025 was not a procurement failure — it reflected the reality that Claude's usage is growing faster than its cost-per-query is declining through software optimization alone. The 37-percentage-point margin gap between current performance and the company's stated IPO target of 77 percent gross margin narrows through two principal levers: higher revenue, which according to Anthropic's own disclosures is already surpassing $30 billion annualized in 2026, and lower per-token inference cost. Custom silicon, if it delivers as planned, addresses the second lever at the architectural level rather than through incremental software tuning.

The financial arithmetic is stark. If a co-designed chip reduces Anthropic's effective inference cost per token by even 20 to 30 percent on its production workloads, the annual dollar impact at $19 billion in compute spending is multiple billions of dollars per year — a return that more than justifies a chip development program whose all-in cost the industry typically estimates at $500 million to over $1 billion over a five-year cycle.

A Multi-Layer Infrastructure Strategy, Not a Single Bet on In-House Silicon

Salek's hire does not mean Anthropic is replacing its existing chip relationships. The company has been consistent in describing its in-house program as one layer within a multi-chip supply strategy, and the scale of its recent external infrastructure commitments makes this explicit.

In October 2025, Anthropic signed a deal for up to one million Google TPUs, a commitment worth tens of billions of dollars in cloud capacity bringing more than a gigawatt of computing power online in 2026. In April 2026, that was extended to a multi-gigawatt agreement with Google and Broadcom for next-generation TPU capacity expected to come online starting in 2027. On the Amazon side, Anthropic's training workloads run primarily on Trainium — Amazon's custom training accelerator — under terms that tie Anthropic to AWS as its primary training cloud. The company has also reported discussions with Microsoft regarding Maia 200 and Maia 300 inference chips.

The most revealing recent moves in the infrastructure strategy, made in the weeks immediately surrounding the Salek announcement, illustrate the diversification logic. Anthropic signed a $9.1 billion, 20-year agreement with Riot Platforms — a former Bitcoin miner converting its Rockdale, Texas campus to AI infrastructure — for 191 megawatts of capacity, with the first 96 megawatts of deployment beginning in December 2027. Riot's facility offers what became scarce in 2025 and 2026: grid-connected power at large scale, available without the multi-year construction timeline of a purpose-built AI data center. A separate $10 billion, six-year agreement with Volta Infra Holdings, a startup backed by Nvidia and Andreessen Horowitz, secures 133 megawatts of capacity at a Norwegian data center in Tydal running entirely on hydroelectric power, equipped with Nvidia's latest Vera Rubin systems.

These are not stopgaps. They are the infrastructure that will host Claude workloads for the next several years — including, eventually, Anthropic's own chips once they reach production. The role of the custom silicon program within this structure is to introduce a cost-optimized tier for the specific subset of inference workloads where Anthropic's computational patterns are stable enough for co-design assumptions to hold, while continuing to rely on external silicon for training, research, and the portions of inference where workload patterns remain fluid.

The Fractile commitment, an initial $250 million purchase agreement for chips not expected to ship until 2027, fits the same architectural diversification logic. Fractile's memory-compute fusion approach executes inference operations directly in on-chip SRAM — a design claiming to eliminate the weight-transfer bottleneck at the hardware level rather than accelerating it through faster HBM or managing it through software. The company is using a RISC-V vector processor core licensed from Andes Technology, with custom arithmetic extensions tuned to transformer inference patterns. Its performance claims of 100x throughput improvement and 90 percent cost reduction are derived from simulation, not production silicon, and have not been independently verified. But Anthropic's engineering teams, with access to Fractile's architecture in greater detail than public sources permit, evidently found the underlying physics credible enough to commit before the chip exists.

Where Anthropic Stands in the Custom Silicon Race

When Anthropic's Custom Silicon Team was announced on August 5, it became the last major frontier AI lab to formalize an in-house chip program — but hired into it a level of chip-program leadership that its earlier-moving competitors have not matched.

OpenAI unveiled Jalapeño in June 2026: a Broadcom-designed inference chip targeted for production deployment in the second half of 2026. It is a significant chip, but the key word is Broadcom-designed. The chip was built by a third-party semiconductor company to OpenAI's specifications, which means its deepest architectural assumptions reflect Broadcom's design team's understanding of transformer inference, not engineers who have trained and deployed GPT-4 and GPT-5 themselves. Meta's MTIA accelerator family addresses a broader set of Meta AI workloads — recommendation systems, image generation, generative text — not a single frontier model family. Google DeepMind has run on TPUs for over a decade, with Ironwood now available in general availability on Google Cloud, but those chips must serve all of Google's internal AI workloads simultaneously, not only the demands of a single model line.

Anthropic's in-house program will design for Claude and nothing else. That specificity is both its advantage and its constraint: a Claude-optimized chip may be unusable for other workloads, but the depth of optimization possible when a chip is designed to match a single model family's exact computational signature is not available to a chip that must serve a heterogeneous customer base.

Whether Anthropic's late entry into the race — formal program launch: August 2026, compared to Google's internal TPU program beginning in 2013, OpenAI's chip program in late 2023 — is a handicap or an advantage depends on timing. A program that begins design in 2026 benefits from knowing how transformer inference actually scales at frontier model sizes, which model architectures prove most durable, and which hardware bottlenecks the preceding generation of chips failed to address. The risk is that Nvidia, Google, and Amazon will not stand still during the 2026-through-2028 design cycle, and a chip that seemed competitive in 2026 architectural planning may arrive into a different competitive environment in 2028.

Execution Risk and the Gate That Actually Matters Next

Even with Salek's experience guiding the program, the constraints are structural. Chip development cycles run three to five years from initial architecture definition to production ramp; a program assembling its first leadership team in summer 2026 is unlikely to put chips into production before 2028 at the earliest. That timeline means Claude will continue to run on external silicon — Google's TPUs, Amazon's Trainium, Nvidia's GPUs — for at least two more model generations before any Anthropic-designed accelerator contributes meaningfully to the production compute mix.

Manufacturing is a separate constraint from design. Anthropic has been in discussions with Samsung as a potential foundry partner, exploring Samsung's 2nm process and its advanced High Bandwidth Memory integration. Those talks, reported by The Information and Bloomberg in July 2026, remain preliminary — no deal has been confirmed. TSMC, the alternative and more commonly preferred advanced-node foundry for AI chips, operates with long queue times; any Anthropic chip program must secure manufacturing capacity years before production begins. Tape-out — the formal submission of a finalized design to the foundry for mask making and fabrication — is the engineering gate that will definitively separate Anthropic's chip program from a chip.

The software ecosystem challenge is also real but more tractable for Anthropic than for a startup approaching the problem from outside. Switching from Nvidia GPU inference to any custom architecture requires rebuilding the production software stack: kernel optimizations, batching strategies, memory management routines, monitoring infrastructure. Anthropic, which co-designs software and hardware jointly with Google for its TPU workloads, has more experience with this migration challenge than most companies. That familiarity does not eliminate the engineering cost, but it means Salek arrives into an organization that already understands non-Nvidia silicon deployment at production scale.

The broader economic constraint is volume. Custom chip economics become favorable only when production scale justifies the amortized development cost. A $500 million to $1 billion development program requires either sufficient production volume to drive unit costs well below what GPU rental costs, or a large enough per-token cost advantage that a smaller production volume delivers the required return. At $30 billion in annual revenue and $19 billion in estimated compute spending, Anthropic's production scale is almost certainly sufficient to justify the investment — but that calculation depends on Claude's revenue growth continuing and on the chip delivering a cost advantage large enough to close the gap between current and target gross margins.

The next public milestone to watch is not a chip tape-out, which Anthropic will likely not announce. It is the foundry commitment. A finalized Samsung partnership or an alternative manufacturing arrangement would signal that Anthropic has moved from assembling a design team to committing the resources required to fabricate silicon. That announcement, if it comes, would establish the timeline within which Salek's nine years of experience building the chips that every major AI lab now depends upon will be directed toward building the chip that Anthropic itself needs most.