AMD and Intel Back Salience Labs' $125M Round for All-Optical AI Switching
Oxford startup's photonic chip claims 10-nanosecond latency and 8× less power than copper OEO

Salience Labs, an Oxford-born silicon photonics startup, closed an oversubscribed $125 million Series B on October 14, 2026, to fund commercial scale-up of its all-optical circuit switching architecture for AI data center interconnects. The round was led by Bullhound Capital, with AMD Ventures, Intel Capital, Hudson River Trading, SBI Group, Applied Ventures, Oxford Science Enterprises, Cambridge Innovation Capital, Silicon Catalyst Ventures, and the British Business Bank participating.
The presence of both AMD Ventures and Intel Capital—direct GPU platform competitors—in the same round carries more than financial significance. Today's dominant rack-to-rack interconnects—InfiniBand and Nvidia NVLink—require optical-to-electrical-to-optical (OEO) conversion at each switching hop, consuming power and adding latency at every stage. Routing light directly through a photonic switch matrix eliminates that overhead entirely. AMD's MI-series GPU roadmap includes planned optical interface support beginning in 2027—AMD's plan rather than a committed order for Salience—and when two rival chip companies co-invest in the same photonic switching startup, it implies both have concluded that all-optical switching is becoming a required infrastructure layer for the clusters those GPUs will populate.
How Salience Routes Light Without Converting It to Electricity
An optical circuit switch establishes a direct optical path between ports by reconfiguring a photonic switching element—directing the light itself rather than an electrical encoding of it. The company has confirmed that its switching element is neither a micro-electromechanical mirror (MEMS) nor a liquid-crystal-on-silicon (LCoS) device, the two most widely deployed OCS mechanisms, though the specific switching physics have not been disclosed.
The company's claimed differentiator is on-chip integration of semiconductor optical amplifiers (SOAs) alongside the switch matrix, fabricated on CMOS-compatible wafers through Tower Semiconductor. Conventional OCS designs require external amplifier stages to compensate for insertion loss; Salience integrates amplification directly on the photonic chip. "This funding, alongside the support of our investors AMD Ventures and Intel Capital, will accelerate our growth into high-volume production to enable world-leading performance in AI data centers," said Vaysh Kewada, CEO and co-founder of Salience Labs. Intel Capital's managing director Srini Ananth described Salience as standing out "through its integrated silicon photonics architecture and proprietary optical amplification, addressing key challenges to deploying optical switching at scale"—though no independent evaluation of these claims has been published.
The 32-port switch launched at the Optical Fiber Conference in Los Angeles in March 2026 specifies 10-nanosecond switching latency, reconfiguration under 300 microseconds, insertion loss below 2 dB, and under 1 watt per port. The company claims the architecture uses eight times less power than equivalent copper-based OEO solutions, though the comparison baseline has not been published. A 64-port version was demonstrated at ECOC 2026 in Málaga in September 2026, which the company describes as an industry first for silicon photonics-based OCS.
Google Proved the Concept; Now Startups Are Racing to Reach Production
Salience faces a competitive field that solidified significantly in 2026. Oriole Networks, a UCL spinout that has deployed its photonic switching platform alongside AMD Instinct GPUs in the UK government's £50 million ARIA Scaling Inference Lab, represents the operationally most advanced startup OCS deployment reported to date. Lumentum, a public optical components company, demonstrated its R300 circuit switch alongside Marvell at OFC 2026, showcasing a rack-level system designed for hyperscaler AI fabrics.
The most credible existing validation for the technology class is Google's Mission Apollo deployment, which reported a 40 percent reduction in network power and a 30 percent reduction in capital cost from large-scale OCS adoption. Cignal AI's July 2026 market report raised its OCS market forecast to more than $8 billion by 2030. The scale of investor confidence in the broader optical networking space was also underscored in August 2026, when optical networking startup Lumilens emerged from stealth with more than $700 million in new Series C funding at a $5.51 billion valuation, already shipping optical transceivers into a hyperscaler's production data centers.
Performance Claims Remain Unverified; Production Covers Only the 32-Port Switch
None of Salience's published specifications—10-nanosecond latency, sub-2-dB insertion loss, the 8× power advantage—have been reproduced by an independent evaluator. The comparison baseline for the 8× claim has not been published. The switching physics inside the chip are undisclosed, preventing external assessment of thermal sensitivity, reliability, or failure modes. Commercially, only the 32-port switch is currently in production; the 64-port product remains at demonstration stage.
The 2027 AMD Optical Deadline Sets the Real Test
The $125 million raised will finance Silicon Valley operations and a production ramp through Tower Semiconductor. Salience's roadmap extends to 128-port and 256-port configurations capable of connecting substantially larger GPU clusters within a single non-blocking optical switching domain, though no delivery timeline has been committed.
AMD's concurrent collaboration with Oriole Networks on a live photonic network deployment—while also backing Salience Labs through AMD Ventures—reflects a hedging posture: the company cannot yet know which OCS architecture will prove manufacturable at hyperscaler reliability standards. When AMD's MI500 optical interfaces arrive in 2027, suppliers already at production scale will have a structural advantage. Salience's $125 million is a bet that its silicon photonics approach reaches that threshold first.